FPGA internship

The candidates are required to have digital systems architectures  knowledge, Networking (wireless and wired) knowledge and VHDL (or
 Verilog) hardware description language.

During the internship, you will become familiar with:
- complex FPGA designs
- basic networking  algorithms
- hardware-software interfacing (registers, DMA, memory mappings, TX/RX packet rings, etc.)

Network Processing Core (NPU) is a specialized CPU used to process network packets. NPU should handle in a real-time manner pattern matching, key look- up, data bitfield manipulation and queues management.

You will be working in an NPU research project which will investigate new hardware parallel architectures for multicore network processor in hardware.

You job will be to design and implement a multi-core network processor.

Specific tasks include:
- explore new NPU architectures and design both flexible and configurable PE (processing elements) for incoming packet processing.
-  design and implement communications queues with and external control CPU.

You should be able to present a proof of concept at the end of the intership.